[][src]Function core::arch::mips64::__msa_bneg_w

pub unsafe fn __msa_bneg_w(a: v4u32, b: v4u32) -> v4u32
🔬 This is a nightly-only experimental API. (stdsimd #48556)
This is supported on MIPS-64 and target feature msa only.

Vector Bit Negate

Negate (complement) one bit in each element of vector a (four unsigned 32-bit integer numbers) The bit position is given by the elements in vector 'b' (four unsigned 32-bit integer numbers) modulo thesize of the element in bits. The result is written to vector (four unsigned 32-bit integer numbers)