[][src]Function core::arch::mips::__msa_srli_b

pub unsafe fn __msa_srli_b(a: v16i8, imm4: i32) -> v16i8
🔬 This is a nightly-only experimental API. (stdsimd #48556)
This is supported on MIPS and target feature msa only.

Immediate Shift Right Logical

The elements in vector 'a'(sixteen signed 8-bit integer numbers) are shifted right logical by imm4 bits. The result is written to vector(sixteen signed 8-bit integer numbers).